The present invention relates to a defect inspecting apparatus, a defect inspecting method, a semiconductor device manufacturing system, and a semiconductor device manufacturing method.
In a semiconductor device manufacturing process, many patterned elements are formed in multiple layers on a semiconductor wafer. Electric properties of completed elements are inspected and defective elements are excluded from the assembly process. Yields are very important in the semiconductor device manufacturing process. The results of the inspection of the electric properties are fed back to the manufacturing process and are used for managing each process step. However, the semiconductor device manufacturing process involves many process steps and takes a considerably long time from the start of the manufacturing to the inspection of the electric properties. Therefore, when a defect is found by an inspection of electric properties during the manufacturing process, many wafers have already been in process at that point in time and the result of the inspection cannot adequately be used for improving yields.
Therefore, patterns formed in a process step (for example in each layer) are inspected for defects (such as contaminations and pattern defects). By conducting inspections in multiple process steps in the manufacturing process, defects can be quickly detected and the result of the inspection can be quickly reflected in process control.
A defect inspection is performed by illuminating a wafer with inspection light, collecting reflected light with a lens, generating an image with an image sensor, and comparing the image with a reference image. The intensity of reflected inspection light varies depending on patterns on the wafer. Accordingly, if the same level of light is used and the same threshold of the intensity of received light above which an element is regarded as a defective one is set, regions (high-sensitivity regions) where defects can be readily detected and regions (low-sensitivity regions) where defects cannot readily be detected appear. To address this, in the case of a memory product which has a cell section of a simple shape and includes a small number of cells, an operator conducts defect inspections of the memory product by manually setting different sensitivities for the cell section and the surrounding circuit section while watching the wafer.
However, in the case of a product such as a logic product which has random patterns, it is difficult to manually setting sensitivities because many high-sensitivity regions and low-sensitivity regions are scattered. Therefore, in the case of a logic product, the entire wafer must be inspected with the same sensitivity and, once the false defect rate has been reduced to a certain value, defects in low-sensitivity regions cannot be detected.
To solve the problem, a defect inspecting apparatus has been proposed in which a region to be inspected is divided into inspection subregions, the line density (=area of line/area of inspection subregion) of each inspection subregion is calculated, a sensitivity rank is assigned to the region on the basis of the calculated line density, and an inspection parameter is set (see Japanese Patent Laid-Open No. 2002-323458, for example).
However, a sensitivity rank based only on the line density does not agree with an actual defect detection sensitivity. Furthermore, the number of inspection subregions to which sensitivity ranks are assigned is enormous. When they are directly provided to the inspecting apparatus, it has been possible that the inspecting apparatus cannot properly function or inspection regions cannot successfully be set.